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» Design and Implementation of the TRIPS Primary Memory System
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CODES
2008
IEEE
14 years 3 months ago
Don't forget memories: a case study redesigning a pattern counting ASIC circuit for FPGAs
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...
David Sheldon, Frank Vahid
CGO
2005
IEEE
14 years 2 months ago
SWIFT: Software Implemented Fault Tolerance
To improve performance and reduce power, processor designers employ advances that shrink feature sizes, lower voltage levels, reduce noise margins, and increase clock rates. Howev...
George A. Reis, Jonathan Chang, Neil Vachharajani,...
ASPLOS
2011
ACM
13 years 3 days ago
NV-Heaps: making persistent objects fast and safe with next-generation, non-volatile memories
nt, user-defined objects present an attractive abstraction for working with non-volatile program state. However, the slow speed of persistent storage (i.e., disk) has restricted ...
Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laur...
SIGMETRICS
1992
ACM
128views Hardware» more  SIGMETRICS 1992»
14 years 16 days ago
MemSpy: Analyzing Memory System Bottlenecks in Programs
To cope with the increasing difference between processor and main memory speeds, modern computer systems use deep memory hierarchies. In the presence of such hierarchies, the perf...
Margaret Martonosi, Anoop Gupta, Thomas E. Anderso...
CODES
2006
IEEE
14 years 2 months ago
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
Antonis Papanikolaou, T. Grabner, Miguel Miranda, ...