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» Design and Implementation of the TRIPS Primary Memory System
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CANPC
1999
Springer
14 years 24 days ago
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
David Brooks, Margaret Martonosi
WDAG
1998
Springer
107views Algorithms» more  WDAG 1998»
14 years 21 days ago
Transient Fault Detectors
We present fault detectors for transient faults, (i.e. corruptions of the memory of the processors, but not of the code of the processors). We distinguish fault detectors for tasks...
Joffroy Beauquier, Sylvie Delaët, Shlomi Dole...
USENIX
2007
13 years 10 months ago
Virtual Machine Memory Access Tracing with Hypervisor Exclusive Cache
Virtual machine (VM) memory allocation and VM consolidation can benefit from the prediction of VM page miss rate at each candidate memory size. Such prediction is challenging for...
Pin Lu, Kai Shen
VLDB
1987
ACM
93views Database» more  VLDB 1987»
13 years 12 months ago
FAD, a Powerful and Simple Database Language
FAD is a powerful and simple language designed for a highly parallel database machine. The basic concepts of the language are its data structures (which we call objects) and its p...
François Bancilhon, Ted Briggs, Setrag Khos...
CLOUDCOM
2010
Springer
13 years 6 months ago
REMEM: REmote MEMory as Checkpointing Storage
Checkpointing is a widely used mechanism for supporting fault tolerance, but notorious in its high-cost disk access. The idea of memory-based checkpointing has been extensively stu...
Hui Jin, Xian-He Sun, Yong Chen, Tao Ke