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CODES
2006
IEEE
14 years 2 months ago
Automatic generation of transaction level models for rapid design space exploration
Transaction-level modeling has been touted to improve simulation performance and modeling efficiency for early design space exploration. But no tools are available to generate suc...
Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rain...
VLSISP
2008
134views more  VLSISP 2008»
13 years 8 months ago
Calibration of Abstract Performance Models for System-Level Design Space Exploration
ion of Abstract Performance Models for System-Level Design Space Exploration ANDY D. PIMENTEL, MARK THOMPSON, SIMON POLSTRA AND CAGKAN ERBAS Computer Systems Architecture Group, In...
Andy D. Pimentel, Mark Thompson, Simon Polstra, Ca...
DATE
2009
IEEE
139views Hardware» more  DATE 2009»
14 years 3 months ago
Cross-architectural design space exploration tool for reconfigurable processors
—Processors that deploy fine-grained reconfigurable fabrics to implement application-specific accelerators ondemand obtained significant attention within the last decade. They tr...
Lars Bauer, Muhammad Shafique, Jörg Henkel
DAC
1997
ACM
14 years 28 days ago
Methodology for Behavioral Synthesis-Based Algorithm-Level Design Space Exploration: DCT Case Study
: Numerous fast algorithms for the Discrete Cosine Transform DCT have been proposed. Until recently, it has been di cult to compare di erent DCT algorithms and select one which i...
Miodrag Potkonjak, Kyosun Kim, Ramesh Karri
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
14 years 3 months ago
User-centric design space exploration for heterogeneous Network-on-Chip platforms
- In this paper, we present a design methodology for automatic platform generation of future heterogeneous systems where communication happens via the Network-onChip (NoC) approach...
Chen-Ling Chou, Radu Marculescu