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» Design and application of multimodal power gating structures
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MICRO
1997
IEEE
139views Hardware» more  MICRO 1997»
14 years 1 months ago
The Filter Cache: An Energy Efficient Memory Structure
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
Johnson Kin, Munish Gupta, William H. Mangione-Smi...
CODES
2006
IEEE
14 years 2 months ago
Design space exploration of real-time multi-media MPSoCs with heterogeneous scheduling policies
Real-time multi-media applications are increasingly being mapped onto MPSoC (multi-processor system-on-chip) platforms containing hardware-software IPs (intellectual property) alo...
Minyoung Kim, Sudarshan Banerjee, Nikil Dutt, Nali...
TVLSI
2008
139views more  TVLSI 2008»
13 years 8 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood
FCCM
2004
IEEE
143views VLSI» more  FCCM 2004»
14 years 18 days ago
Reconfigurable Molecular Dynamics Simulator
Current high-performance applications are typically implemented on large-scale general-purpose distributed or multiprocessing systems often based on commodity microprocessors. Fie...
Navid Azizi, Ian Kuon, Aaron Egier, Ahmad Darabiha...
ISLPED
1998
ACM
69views Hardware» more  ISLPED 1998»
14 years 1 months ago
A unified approach in the analysis of latches and flip-flops for low-power systems
In this paper we propose a set of rules for consistent estimation of the real performance and power features of the latch and flip-flop structures. A new simulation and optimizati...
Vladimir Stojanovic, Vojin G. Oklobdzija, Raminder...