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» Design and application of multimodal power gating structures
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GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
14 years 3 months ago
A table-based method for single-pass cache optimization
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank V...
ICRA
2009
IEEE
119views Robotics» more  ICRA 2009»
14 years 3 months ago
Rapid pole climbing with a quadrupedal robot
— This paper describes the development of a legged robot designed for general locomotion of complex terrain but specialized for dynamical, high-speed climbing of a uniformly conv...
G. Clark Haynes, Alex Khripin, Goran Lynch, Jonath...
VLSID
2006
IEEE
158views VLSI» more  VLSID 2006»
14 years 2 months ago
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm
Low density parity check (LDPC) codes are one of the most powerful error correcting codes known. Recent research have pointed out their potential for a low cost, low latency hardw...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
PUC
2002
82views more  PUC 2002»
13 years 8 months ago
A Location Model for Communicating and Processing of Context
Location is one of the most important elements of context in ubiquitous computing. In this paper we describe a location model, a spatial-aware communication model and an implement...
Michael Beigl, Tobias Zimmer, Christian Decker
ICCD
2008
IEEE
109views Hardware» more  ICCD 2008»
14 years 5 months ago
Suitable cache organizations for a novel biomedical implant processor
— This paper evaluates various instruction- and data-cache organizations in terms of performance, power, energy and area on a suitably selected biomedical benchmark suite. The be...
Christos Strydis