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» Design and application of multimodal power gating structures
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APCCAS
2006
IEEE
271views Hardware» more  APCCAS 2006»
14 years 1 months ago
Leakage Optimized DECAP Design for FPGAs
— On-chip decoupling capacitors (Decaps) are widely used to mitigate on-chip power supply noise. At and below 100nm on-chip decaps face leakage and area overhead problems associa...
Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, ...
APCCAS
2006
IEEE
229views Hardware» more  APCCAS 2006»
14 years 1 months ago
Low Power Combinational Multipliers using Data-driven Signal Gating
— A data driven approach to design and optimization of low power combinational multipliers is presented. This technique depends on signal gating to avoid un-necessary computation...
Nima Honarmand, Ali Afzali-Kusha
GLVLSI
2003
IEEE
132views VLSI» more  GLVLSI 2003»
14 years 25 days ago
Power-aware pipelined multiplier design based on 2-dimensional pipeline gating
Power-awareness indicates the scalability of the system energy with changing conditions and quality requirements. Multipliers are essential elements used in DSP applications and c...
Jia Di, Jiann S. Yuan
ISLPED
2004
ACM
122views Hardware» more  ISLPED 2004»
14 years 29 days ago
Microarchitectural techniques for power gating of execution units
Leakage power is a major concern in current and future microprocessor designs. In this paper, we explore the potential of architectural techniques to reduce leakage through power-...
Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan,...
ICCAD
2005
IEEE
114views Hardware» more  ICCAD 2005»
14 years 4 months ago
Double-gate SOI devices for low-power and high-performance applications
: Double-Gate (DG) transistors have emerged as promising devices for nano-scale circuits due to their better scalability compared to bulk CMOS. Among the various types of DG device...
Kaushik Roy, Hamid Mahmoodi-Meimand, Saibal Mukhop...