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» Design and implementation of JPEG encoder IP core
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CCECE
2006
IEEE
14 years 2 months ago
Reconfigurable Implementation of Wavelet Transform on an Fpga-Augmented NIOS Processor
The wavelet transform is a very popular tool in engineering for signal analysis. With respect to image compression, the new JPEG 2000 image standard incorporates wavelet transform...
Eugene Hyun, Mihai Sima, Michael McGuire
SEUS
2008
IEEE
14 years 2 months ago
Model Based Synthesis of Embedded Software
Abstract— This paper presents SW synthesis using Embedded System Environment (ESE), a tool set for design of multicore embedded systems. We propose a classification of multicore...
Daniel D. Gajski, Samar Abdi, Ines Viskic
NOSSDAV
1995
Springer
13 years 12 months ago
Meeting Arbitrary QoS Constraints Using Dynamic Rate Shaping of Coded Digital Video
Abstract. We introduce the concept of Dynamic Rate Shaping, a technique to adapt the rate ofcompressed video bitstreams MPEG-1, MPEG2, H.261, as well as JPEG to dynamically varyi...
Alexandros Eleftheriadis, Dimitris Anastassiou
AHS
2007
IEEE
239views Hardware» more  AHS 2007»
14 years 13 days ago
Separation of Data flow and Control flow in Reconfigurable Multi-core SoCs using the Gannet Service-based Architecture
This paper presents a mechanism for the separation of control and data flow in NoC-based SoCs consisting of multiple heterogeneous reconfigurable IP cores. This mechanism enables ...
Wim Vanderbauwhede
TCAD
2008
183views more  TCAD 2008»
13 years 8 months ago
Systematic and Automated Multiprocessor System Design, Programming, and Implementation
Abstract--For modern embedded systems in the realm of highthroughput multimedia, imaging, and signal processing, the complexity of embedded applications has reached a point where t...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere