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PVM
2010
Springer
13 years 7 months ago
Enabling Concurrent Multithreaded MPI Communication on Multicore Petascale Systems
With the ever-increasing numbers of cores per node on HPC systems, applications are increasingly using threads to exploit the shared memory within a node, combined with MPI across ...
Gábor Dózsa, Sameer Kumar, Pavan Bal...
IPPS
1998
IEEE
14 years 1 months ago
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile...
PODC
2010
ACM
14 years 22 days ago
Brief announcement: anonymity and trust in distributed systems
In this paper, we present a framework for achieving anonymity and trust, two seemingly contradictory properties, in distributed systems. Our approach builds on webs of trust, a we...
Michael Backes, Stefan Lorenz, Matteo Maffei, Kim ...
IPPS
2008
IEEE
14 years 3 months ago
Design of scalable dense linear algebra libraries for multithreaded architectures: the LU factorization
The scalable parallel implementation, targeting SMP and/or multicore architectures, of dense linear algebra libraries is analyzed. Using the LU factorization as a case study, it is...
Gregorio Quintana-Ortí, Enrique S. Quintana...
HOTI
2005
IEEE
14 years 2 months ago
Control Path Implementation for a Low-Latency Optical HPC Switch
— A crucial part of any high-performance computing system is its interconnection network. In the OSMOSIS project, Corning and IBM are jointly developing a demonstrator interconne...
Cyriel Minkenberg, François Abel, Peter M&u...