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ICCAD
1993
IEEE
111views Hardware» more  ICCAD 1993»
13 years 11 months ago
Unifying synchronous/asynchronous state machine synthesis
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
Kenneth Y. Yun, David L. Dill
TON
1998
71views more  TON 1998»
13 years 7 months ago
Real-time block transfer under a link-sharing hierarchy
— Most application data units are too large to be carried in a single packet (or cell) and must be segmented for network delivery. To an application, the end-to-end delays and lo...
Geoffrey G. Xie, Simon S. Lam
FCCM
2007
IEEE
111views VLSI» more  FCCM 2007»
14 years 1 months ago
A Structural Object Programming Model, Architecture, Chip and Tools for Reconfigurable Computing
A new platform for reconfigurable computing has an object-based programming model, with architecture, silicon and tools designed to faithfully realize this model. The platform is ...
Michael Butts, Anthony Mark Jones, Paul Wasson
RTSS
1994
IEEE
13 years 11 months ago
Guaranteeing End-to-End Timing Constraints by Calibrating Intermediate Processes
This paper presents a comprehensive design methodology for guaranteeing end-to-end requirements of real-time systems. Applications are structured as a set of process components co...
Richard Gerber, Seongsoo Hong, Manas Saksena
HASE
2007
IEEE
14 years 1 months ago
Systems Architectures for Transactional Network Interface
Systems such as software transactional memory and some exception handling techniques use transactions. However, a typical limitation of such systems is that they do not allow syst...
Manish Marwah, Shivakant Mishra, Christof Fetzer