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    BMAS
    2000
    IEEE
    108views Modeling and Simulation» more  BMAS 2000»
    High-Level Design Case of a Switched-Capacitor Low-Pass Filter Using Verilog-A
    14 years 1 days ago
    High-Level Design Case of a Switched-Capacitor Low-Pass Filter Using Verilog-A
    Download  www.bmas-conf.org
    System design requires experienced designers that use heuristics and built up knowledge to propose a high order solution. Behavioral models can help to formalise, optimise and spe...
    Erik Lauwers, Georges G. E. Gielen, Koen Lampaert,...
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    DSN
    2007
    IEEE
    141views Computer Networks» more  DSN 2007»
    Performability Models for Multi-Server Systems with High-Variance Repair Durations
    13 years 11 months ago
    Performability Models for Multi-Server Systems with High-Variance Repair Durations
    Download  home.southernct.edu
    We consider cluster systems with multiple nodes where each server is prone to run tasks at a degraded level of service due to some software or hardware fault. The cluster serves t...
    Hans-Peter Schwefel, Imad Antonios
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    WSC
    1997
    151views Modeling And Simulation» more  WSC 1997»
    A Performance Monitoring Application for Distributed Interactive Simulations (DIS)
    13 years 9 months ago
    A Performance Monitoring Application for Distributed Interactive Simulations (DIS)
    Download  www.informs-sim.org
    This paper discusses the design, development, and use of a performance monitoring tool for Distributed Interactive Simulations (DIS). A typical DIS environment consists of hundred...
    David B. Cavitt, C. Michael Overstreet, Kurt Maly
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    RTCSA
    2007
    IEEE
    168views Embedded Systems» more  RTCSA 2007»
    An MPSoC Performance Estimation Framework Using Transaction Level Modeling
    14 years 1 months ago
    An MPSoC Performance Estimation Framework Using Transaction Level Modeling
    Download  www.univ-valenciennes.fr
    — To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
    Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
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    ERSA
    2007
    174views Hardware» more  ERSA 2007»
    High-Level Specification of Runtime Reconfigurable Designs
    13 years 9 months ago
    High-Level Specification of Runtime Reconfigurable Designs
    Download  www.ccm.ece.vt.edu
    ”C to Gates” compilers for FPGAs have been a topic of investigation for nearly two decades. Some of these endeavors have reached a point of viability. Impulse C, for example, ...
    Stephen D. Craven, Peter M. Athanas
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