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DSD
2005
IEEE
104views Hardware» more  DSD 2005»
14 years 4 months ago
Design of Transport Triggered Architecture Processors for Wireless Encryption
Transport Triggered Architecture (TTA) offers a costeffective trade-off between the size and performance of ASICs and the programmability of general-purpose processors. In this pa...
Panu Hämäläinen, Jari Heikkinen, Ma...
CSREAESA
2006
14 years 6 days ago
Power Optimization of Interconnection Networks for Transport Triggered Architecture
Transport triggered architecture (TTA) has been shown to provide an efficient way to design application specific instruction set processors. However, the interconnection network of...
Xue-mi Zhao, Zhiying Wang
ISCAS
2005
IEEE
152views Hardware» more  ISCAS 2005»
14 years 4 months ago
Dictionary-based program compression on transport triggered architectures
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...
Jari Heikkinen, Andrea G. M. Cilio, Jarmo Takala, ...
AUTONOMICS
2008
ACM
14 years 24 days ago
Tracking and tracing containers through distributed sensor middleware
In a container transport system, wireless sensor networks (WSNs) can be used for monitoring products while they are being transported. To be commercially interesting, these WSNs m...
Klaas Thoelen, Sam Michiels, Wouter Joosen
HPCC
2007
Springer
14 years 5 months ago
A Low-Power Globally Synchronous Locally Asynchronous FFT Processor
Abstract. Low-power design became crucial with the widespread use of the embedded systems, where a small battery has to last for a long period. The embedded processors need to efï¬...
Yong Li, Zhiying Wang, Jian Ruan, Kui Dai