Sciweavers

351 search results - page 12 / 71
» Design of a WCET-Aware C Compiler
Sort
View
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
14 years 4 months ago
A code refinement methodology for performance-improved synthesis from C
Although many recent advances have been made in hardware synthesis techniques from software programming languages such as C, the performance of synthesized hardware commonly suffe...
Greg Stitt, Frank Vahid, Walid A. Najjar
FDL
2008
IEEE
14 years 1 months ago
Towards Compilation of Streaming Programs into FPGA Hardware
There is an increasing need for automated conversion of high-level design descriptions into hardware. We present a flow that converts a software application written in the Brook ...
Franjo Plavec, Zvonko G. Vranesic, Stephen Dean Br...
PPOPP
1999
ACM
13 years 11 months ago
Automatic Parallelization of Divide and Conquer Algorithms
Divide and conquer algorithms are a good match for modern parallel machines: they tend to have large amounts of inherent parallelism and they work well with caches and deep memory...
Radu Rugina, Martin C. Rinard
LCPC
2001
Springer
13 years 11 months ago
Bridging the Gap between Compilation and Synthesis in the DEFACTO System
Abstract. The DEFACTO project - a Design Environment For Adaptive Computing TechnOlogy - is a system that maps computations, expressed in high-level languages such as C, directly o...
Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoun...
COOTS
1998
13 years 8 months ago
The Design and Performance of MedJava
The Java programming language has gained substantial popularity in the past two years. Java's networking features, along with the growing number of Web browsers that execute J...
Prashant Jain, Seth Widoff, Douglas C. Schmidt