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» Design space exploration of caches using compressed traces
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CAL
2006
13 years 8 months ago
Performance modeling using Monte Carlo simulation
Abstract-- Cycle accurate simulation has long been the primary tool for micro-architecture design and evaluation. Though accurate, the slow speed often imposes constraints on the e...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck
ECSCW
2007
13 years 10 months ago
What Did I Miss? Visualizing the Past through Video Traces
Always-on media spaces broadcast video between collaborators to provide mutual awareness and to encourage casual interaction. This video can be easily recorded on the fly as a vide...
Michael Nunes, Saul Greenberg, M. Sheelagh T. Carp...
VLDB
1997
ACM
104views Database» more  VLDB 1997»
14 years 21 days ago
Integrating Reliable Memory in Databases
Abstract. Recent results in the Rio project at the University of Michigan show that it is possible to create an area of main memory that is as safe as disk from operating system cr...
Wee Teck Ng, Peter M. Chen
ACMSE
2004
ACM
14 years 2 months ago
Performance evaluation of cache replacement policies for the SPEC CPU2000 benchmark suite
Replacement policy, one of the key factors determining the effectiveness of a cache, becomes even more important with latest technological trends toward highly associative caches....
Hussein Al-Zoubi, Aleksandar Milenkovic, Milena Mi...
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
14 years 9 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar