1188 search results - page 200 / 238 » Design space exploration revisited |
DATE
2007
IEEE
14 years 4 months ago
2007
IEEE
We present a methodology for generating optimized architectures for data bandwidth constrained extensible processors. We describe a scalable Integer Linear Programming (ILP) formu...
IEEEPACT
2007
IEEE
14 years 4 months ago
2007
IEEE
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...
NOCS
2007
IEEE
14 years 4 months ago
2007
IEEE
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
VLSI
2007
Springer
14 years 4 months ago
2007
Springer
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
DATE
2006
IEEE
14 years 4 months ago
2006
IEEE
In many computer systems with large data computations, the delay of memory access is one of the major performance bottlenecks. In this paper, we propose an enhanced field remappi...