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» Designing Reliable Digital Molecular Electronic Circuits
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ASYNC
2006
IEEE
122views Hardware» more  ASYNC 2006»
14 years 1 months ago
A Level-Crossing Flash Asynchronous Analog-to-Digital Converter
Distributed sensor networks, human body implants, and hand-held electronics have tight energy budgets that necessitate low power circuits. Most of these devices include an analog-...
Filipp Akopyan, Rajit Manohar, Alyssa B. Apsel
DAC
2009
ACM
14 years 8 months ago
Contract-based system-level composition of analog circuits
Efficient system-level design is increasingly relying on hierarchical design-space exploration, as well as compositional methods, to shorten time-to-market, leverage design re-use...
Xuening Sun, Pierluigi Nuzzo, Chang-Ching Wu, Albe...
ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
14 years 4 months ago
An analytical model for negative bias temperature instability
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a significant reliability concern in present day digital circuit design. With continued scaling, th...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...
DAC
2005
ACM
13 years 9 months ago
Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits
Reliability of nanometer circuits is becoming a major concern in today’s VLSI chip design due to interferences from multiple noise sources as well as radiation-induced soft erro...
Chong Zhao, Yi Zhao, Sujit Dey
CF
2004
ACM
14 years 25 days ago
Fault tolerant clockless wave pipeline design
This paper presents a fault tolerant design technique for the clockless wave pipeline. The specific architectural model investigated in this paper is the two-phase clockless asyn...
T. Feng, Byoungjae Jin, J. Wang, Nohpill Park, Yon...