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EUROPAR
2009
Springer
14 years 2 months ago
High Performance Matrix Multiplication on Many Cores
Moore’s Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level par...
Nan Yuan, Yongbin Zhou, Guangming Tan, Junchao Zha...
PDCN
2007
13 years 9 months ago
Design and evaluation of an auto-memoization processor
This paper describes the design and evaluation of an auto-memoization processor. The major point of this proposal is to detect the multilevel functions and loops with no additiona...
Tomoaki Tsumura, Ikuma Suzuki, Yasuki Ikeuchi, Hir...
ASPLOS
2000
ACM
14 years 14 days ago
Evaluating Design Alternatives for Reliable Communication on High-Speed Networks
We systematically evaluate the performance of five implementations of a single, user-level communication interface. Each implementation makes different architectural assumptions ...
Raoul Bhoedjang, Kees Verstoep, Tim Rühl, Hen...
WSC
2007
13 years 10 months ago
SIMIO: a new simulation system based on intelligent objects
Over the 50 year history of discrete event simulation the growth in applications has been facilitated by some key advances in modeling that have simplified the process of building...
C. Dennis Pegden
IPPS
1998
IEEE
14 years 11 days ago
COMPaS: A Pentium Pro PC-based SMP Cluster and Its Experience
We have built an eight node SMP cluster called COMPaS (Cluster Of Multi-Processor Systems), each node of which is a quadprocessor Pentium Pro PC. We have designed and implemented a...
Yoshio Tanaka, Motohiko Matsuda, Makoto Ando, Kazu...