1993 search results - page 226 / 399 » Designing and Building Parallel Program |
IPPS
2005
IEEE
14 years 3 months ago
2005
IEEE
“MegaProto” is a proof-of-concept prototype for our project “Mega-Scale Computing Based on Low-Power Technology and Workload Modeling”, implementing our key idea that a mi...
PPOPP
2010
ACM
13 years 8 months ago
2010
ACM
Many programs exploit shared-memory parallelism using multithreading. Threaded codes typically use locks to coordinate access to shared data. In many cases, contention for locks r...
IISWC
2009
IEEE
14 years 4 months ago
2009
IEEE
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
HPCC
2009
Springer
14 years 2 months ago
2009
Springer
Compared with lock-based synchronization techniques, Software Transactional Memory (STM) can significantly improve the programmability of multithreaded applications. Existing res...
EUROPAR
2009
Springer
14 years 1 months ago
2009
Springer
The Cell Broadband Engine (Cell BE) is a heterogeneous multi-core processor specifically designed to exploit thread-level parallelism. Its memory model comprehends a common shared ...