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ICS
2009
Tsinghua U.
14 years 4 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
CIKM
2009
Springer
14 years 4 months ago
Packing the most onto your cloud
Parallel dataflow programming frameworks such as Map-Reduce are increasingly being used for large scale data analysis on computing clouds. It is therefore becoming important to a...
Ashraf Aboulnaga, Ziyu Wang, Zi Ye Zhang
DSN
2007
IEEE
14 years 4 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
ICMCS
2007
IEEE
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14 years 4 months ago
A Framework for Modular Signal Processing Systems with High-Performance Requirements
This paper introduces the software framework MMER Lab which allows an effective assembly of modular signal processing systems optimized for memory efficiency and performance. Our...
Lukas Diduch, Ronald Müller, Gerhard Rigoll
ICPADS
2007
IEEE
14 years 4 months ago
Scheduling multiple divisible loads on a linear processor network
Min, Veeravalli, and Barlas have recently proposed strategies to minimize the overall execution time of one or several divisible loads on a heterogeneous linear network, using one...
Matthieu Gallet, Yves Robert, Frédér...