2945 search results - page 475 / 589 » Designing and Implementing Malicious Hardware |
146
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IPPS
2000
IEEE
15 years 10 months ago
2000
IEEE
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
118
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SPAA
2000
ACM
15 years 10 months ago
2000
ACM
The computer industry is currently examining the use of strong synchronization operations such as double compareand-swap (DCAS) as a means of supporting non-blocking synchronizati...
158
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HPCA
1999
IEEE
15 years 10 months ago
1999
IEEE
Control independence has been put forward as a significant new source of instruction-level parallelism for future generation processors. However, its performance potential under p...
158
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HASE
1997
IEEE
15 years 10 months ago
1997
IEEE
The Reusable Software Fault Tolerance Testbed ReSoFT was developed to facilitate the development and evaluation of high-assurance systems that require tolerance of both hardware...
154
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UIST
1996
ACM
15 years 10 months ago
1996
ACM
Most interactive graphical applications that use direct manipulation are built with low-level libraries such as Xlib because the graphic and interaction models of higher-level too...