2945 search results - page 82 / 589 » Designing and Implementing Malicious Hardware |
129
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ESAS
2004
Springer
15 years 9 months ago
2004
Springer
Abstract. Low power consumption, low gate count, and high throughput are standard design criteria for cryptographic coprocessors designated for resource constrained devices such as...
145
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EXPCS
2007
15 years 8 months ago
2007
Simulation has been the de facto standard method for performance evaluation of newly proposed ideas in computer architecture for many years. While simulation allows for theoretica...
139
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GECCO
2007
Springer
15 years 10 months ago
2007
Springer
This work presents a novel approach to filter synthesis on a field programmable analog array (FPAA) architecture using a genetic algorithm (GA). First, a Matlab model of the FPA...
151
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RSP
1999
IEEE
15 years 8 months ago
1999
IEEE
SDL is currently gaining interest as a system level specification language for HW/SW codesign. Automated synthesis of SDL in hardware so far had problems with its efficiency. The ...
172
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TSP
2008
15 years 4 months ago
2008
This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D D...