64 search results - page 2 / 13 » Designing floating codes for expected performance |
CORR
2010
Springer
13 years 5 months ago
2010
Springer
Abstract--Flash memory is well-known for its inherent asymmetry: the flash-cell charge levels are easy to increase but are hard to decrease. In a general rewriting model, the store...
NIPS
2008
13 years 9 months ago
2008
From an information-theoretic perspective, a noisy transmission system such as a visual Brain-Computer Interface (BCI) speller could benefit from the use of errorcorrecting codes....
PPOPP
2005
ACM
14 years 1 months ago
2005
ACM
As increasing the performance of single-threaded processors becomes increasingly difficult, consumer desktop processors are moving toward multi-core designs. One way to enhance th...
FCCM
2007
IEEE
13 years 10 months ago
2007
IEEE
Creating a high throughput sparse matrix vector multiplication (SpMxV) implementation depends on a balanced system design. In this paper, we introduce the innovative SpMxV Solver ...
FAST
2009
13 years 6 months ago
2009
Over the past five years, large-scale storage installations have required fault-protection beyond RAID-5, leading to a flurry of research on and development of erasure codes for m...