In this paper, we report on a user-centered, iterative design process for augmenting sports equipment with ubiquitous computing technology. In several design iterations, a fully w...
Matthias Kranz, Wolfgang Spiessl, Albrecht Schmidt
SRAM-based Field Programmable Gate Arrays (FPGAs) are very susceptible to Single Event Upsets (SEUs) that may have dramatic effects on the circuits they implement. In this paper w...
During the design of storm drainage system, many decisions are involved on the basis of rules of thumb, heuristics, judgment, code of practice and previous experience of the design...
- A current-mode logic (CML) buffer is based on a simple differential circuit. This paper investigates important problems involved in the design of a CML buffer as well as a chain ...
In this work we propose two novel vector quantization (VQ) designs for discrete HMM-based on-line handwriting recognition of whiteboard notes. Both VQ designs represent the binary ...