3395 search results - page 488 / 679 » Designs, Disputes and Strategies |
IPPS
2007
IEEE
14 years 4 months ago
2007
IEEE
This paper describes a scalable parallel marking technique for garbage collection that does not employ any synchronization operation. To achieve good scalability, two major design...
IPPS
2007
IEEE
14 years 4 months ago
2007
IEEE
As process technology advances toward deep submicron (below 90nm), static power becomes a new challenge to address for energy-efficient high performance processors, especially for...
IPPS
2007
IEEE
14 years 4 months ago
2007
IEEE
This paper proposes the study of a new computation model that attempts to address the underlying sources of performance degradation (e.g. latency, overhead, and starvation) and th...
ISVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
In sub-90nm technologies, more frequent hard faults pose a serious burden on processor design and yield control. In addition to manufacturing-time chip repair schemes, microarchit...
IWPC
2007
IEEE
14 years 4 months ago
2007
IEEE
A commonly used strategy to address the scalability challenge in object-oriented reverse engineering is to synthesize coarse-grained representations, such as package diagrams. How...