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HPCA
2006
IEEE
14 years 11 months ago
Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
SIGSOFT
2003
ACM
14 years 11 months ago
ARCHER: using symbolic, path-sensitive analysis to detect memory access errors
Memory corruption errors lead to non-deterministic, elusive crashes. This paper describes ARCHER (ARray CHeckER) a static, effective memory access checker. ARCHER uses path-sensit...
Yichen Xie, Andy Chou, Dawson R. Engler
ITC
2003
IEEE
157views Hardware» more  ITC 2003»
14 years 4 months ago
Parity-Based Concurrent Error Detection in Symmetric Block Ciphers
Deliberate injection of faults into cryptographic devices is an effective cryptanalysis technique against symmetric and asymmetric encryption. We will describe a general concurren...
Ramesh Karri, Grigori Kuznetsov, Michael Göss...
GLOBECOM
2008
IEEE
14 years 5 months ago
Impact of Signaling Schemes on Iterative Linear Minimum-Mean-Square-Error Detection
—In this paper, we study the iterative detection problem for a coded system with multi-ary modulation. We show that, with iterative linear minimum-mean-square-error (LMMSE) detec...
Li Ping, Jun Tong, Xiaojun Yuan, Qinghua Guo
DSN
2008
IEEE
14 years 5 months ago
Using likely program invariants to detect hardware errors
In the near future, hardware is expected to become increasingly vulnerable to faults due to continuously decreasing feature size. Software-level symptoms have previously been used...
Swarup Kumar Sahoo, Man-Lap Li, Pradeep Ramachandr...