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ICCAD
2000
IEEE
109views Hardware» more  ICCAD 2000»
14 years 1 months ago
Latency-Guided On-Chip Bus Network Design
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
Milenko Drinic, Darko Kirovski, Seapahn Meguerdich...
ICCAD
2000
IEEE
95views Hardware» more  ICCAD 2000»
14 years 1 months ago
Test of Future System-on-Chips
Spurred by technology leading to the availability of millions of gates per chip, system-level integration is evolving as a new paradigm, allowing entire systems to be built on a s...
Yervant Zorian, Sujit Dey, Mike Rodgers
IV
2000
IEEE
107views Visualization» more  IV 2000»
14 years 1 months ago
Ideograms in Polyscopic Modeling
“addiction” is defined as a pattern (abstract relationship). Such definition allows us to look in a new way at a number of cultural issues including the values, the lifestyl...
Dino Karabeg
RTAS
2000
IEEE
14 years 1 months ago
Evaluating Policies and Mechanisms for Supporting Embedded, Real-Time Applications with CORBA 3.0
To be an effective platform for performance-sensitive realtime systems, commercial-off-the-shelf (COTS) distributed object computing (DOC) middleware must support application qual...
Carlos O'Ryan, Douglas C. Schmidt, Fred Kuhns, Mar...
RTCSA
2000
IEEE
14 years 1 months ago
Frame packing in real-time communication
A common computational model in distributed embedded systems is that the nodes exchange signals via a network. Most often a signal represents the state of some physical device and...
Kristian Sandström, Christer Norström, M...
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