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INTEGRATION
2007
95views more  INTEGRATION 2007»
13 years 7 months ago
Wire shaping of RLC interconnects
The optimum wire shape to produce the minimum signal propagation delay across an RLC line is shown to exhibit a general exponential form. The line inductance makes exponential tap...
Magdy A. El-Moursy, Eby G. Friedman
JETC
2008
127views more  JETC 2008»
13 years 6 months ago
Automated module assignment in stacked-Vdd designs for high-efficiency power delivery
With aggressive reductions in feature sizes and the integration of multiple functionalities on the same die, bottlenecks due to I/O pin limitations have become a severe issue in to...
Yong Zhan, Sachin S. Sapatnekar
GLVLSI
1998
IEEE
124views VLSI» more  GLVLSI 1998»
13 years 12 months ago
Non-Refreshing Analog Neural Storage Tailored for On-Chip Learning
In this research, we devised a new simple technique for statically holding analog weights, which does not require periodic refreshing. It further contains a mechanism to locally u...
Bassem A. Alhalabi, Qutaibah M. Malluhi, Rafic A. ...
GECCO
2006
Springer
215views Optimization» more  GECCO 2006»
13 years 11 months ago
A multi-chromosome approach to standard and embedded cartesian genetic programming
Embedded Cartesian Genetic Programming (ECGP) is an extension of Cartesian Genetic Programming (CGP) that can automatically acquire, evolve and re-use partial solutions in the for...
James Alfred Walker, Julian Francis Miller, Rachel...
DAC
2007
ACM
14 years 8 months ago
Beyond Low-Order Statistical Response Surfaces: Latent Variable Regression for Efficient, Highly Nonlinear Fitting
The number and magnitude of process variation sources are increasing as we scale further into the nano regime. Today's most successful response surface methods limit us to lo...
Amith Singhee, Rob A. Rutenbar