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» Dimensionality reduction and generalization
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CGO
2010
IEEE
14 years 3 months ago
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bi
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
Tobias J. K. Edler von Koch, Igor Böhm, Bj&ou...
SAC
2010
ACM
14 years 3 months ago
Asynchronous Byzantine consensus with 2f+1 processes
Byzantine consensus in asynchronous message-passing systems has been shown to require at least 3f + 1 processes to be solvable in several system models (e.g., with failure detecto...
Miguel Correia, Giuliana Santos Veronese, Lau Cheu...
POPL
2009
ACM
14 years 3 months ago
Declarative aspects of memory management in the concurrent collections parallel programming model
Concurrent Collections (CnC)[8] is a declarative parallel language that allows the application developer to express their parallel application as a collection of high-level comput...
Zoran Budimlic, Aparna Chandramowlishwaran, Kathle...
SAC
2009
ACM
14 years 3 months ago
Impact of NVRAM write cache for file system metadata on I/O performance in embedded systems
File systems make use of part of DRAM as the buffer cache to enhance its performance in traditional systems. In this paper, we consider the use of Non-Volatile RAM (NVRAM) as a w...
In Hwan Doh, Hyo J. Lee, Young Je Moon, Eunsam Kim...
SAC
2009
ACM
14 years 3 months ago
Visualization of clustered directed acyclic graphs with node interleaving
Graph drawing and visualization represent structural information ams of abstract graphs and networks. An important subset of graphs is directed acyclic graphs (DAGs). E-Spring alg...
Pushpa Kumar, Kang Zhang