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» Dimensionality reduction and generalization
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CODES
2006
IEEE
14 years 2 months ago
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
Martijn Coenen, Srinivasan Murali, Andrei Radulesc...
ICDCS
2006
IEEE
14 years 2 months ago
Greedy is Good: On Service Tree Placement for In-Network Stream Processing
This paper is concerned with reducing communication costs when executing distributed user tasks in a sensor network. We take a service-oriented abstraction of sensor networks, whe...
Zoë Abrams, Jie Liu
IPPS
2006
IEEE
14 years 2 months ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...
CASES
2006
ACM
14 years 2 months ago
Adaptive object code compression
Previous object code compression schemes have employed static and semiadaptive compression algorithms to reduce the size of instruction memory in embedded systems. The suggestion ...
John Gilbert, David M. Abrahamson
SIGCOMM
2006
ACM
14 years 2 months ago
Beyond bloom filters: from approximate membership checks to approximate state machines
Many networking applications require fast state lookups in a concurrent state machine, which tracks the state of a large number of flows simultaneously. We consider the question ...
Flavio Bonomi, Michael Mitzenmacher, Rina Panigrah...