Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
Niti Madan, Li Zhao, Naveen Muralimanohar, Anirudd...
Address correlation is a technique that links the addresses that reference the same data values. Using a detailed source-code level analysis, a recent study [1] revealed that diffe...
We are developing an approach for P2P information systems, where the peers are modeled as autonomous agents. Agents provide services or give referrals to one another to help find...
Traditional le system implementations do not allow applications to control le caching replacement decisions. We have implemented two-level replacement, a scheme that allows appl...
Abstract. We present new performance models and a new, more compact data structure for cache blocking when applied to the sparse matrixvector multiply (SpM×V) operation, y ← y +...
Rajesh Nishtala, Richard W. Vuduc, James Demmel, K...