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IEEEPACT
2000
IEEE
14 years 2 months ago
aSOC: A Scalable, Single-Chip Communications Architecture
As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with onchip system-leve...
Jian Liang, Sriram Swaminathan, Russell Tessier
IPPS
2000
IEEE
14 years 2 months ago
The Memory Bandwidth Bottleneck and its Amelioration by a Compiler
As the speed gap between CPU and memory widens, memory hierarchy has become the primary factor limiting program performance. Until now, the principal focus of hardware and softwar...
Chen Ding, Ken Kennedy
CONCUR
2000
Springer
14 years 2 months ago
LP Deadlock Checking Using Partial Order Dependencies
Model checking based on the causal partial order semantics of Petri nets is an approach widely applied to cope with the state space explosion problem. One of the ways to exploit su...
Victor Khomenko, Maciej Koutny
MOBICOM
1999
ACM
14 years 2 months ago
Next Century Challenges: Data-Centric Networking for Invisible Computing
Computing and telecommunications are maturing, and the next century promises a shift away from technology-driven general-purpose devices. Instead, we will focus on the needs of co...
Mike Esler, Jeffrey Hightower, Thomas E. Anderson,...
FTDCS
1999
IEEE
14 years 2 months ago
Priority Scheduling and Buffer Management for ATM Traffic Shaping
The impact of buffer management and priority scheduling is examined in stressful scenarios when the aggregate incoming traffic is higher than the output link capacity of an Asynch...
Todd Lizambri, Fernando Duran, Shukri Wakid