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QEST
2010
IEEE
13 years 5 months ago
Timed Branching Processes
We study Timed Branching Processes (TBPs), a natural extension of (multitype) Branching Processes (BPs) where each entity is equipped with a finite set of private continuous variab...
Ashutosh Trivedi, Dominik Wojtczak
IPPS
1994
IEEE
13 years 11 months ago
Parallel Evaluation of a Parallel Architecture by Means of Calibrated Emulation
A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
CONCUR
2007
Springer
14 years 1 months ago
Timed Concurrent Game Structures
Abstract. We propose a new model for timed games, based on concurrent game structures (CGSs). Compared to the classical timed game automata of Asarin et al. [8], our timed CGSs are...
Thomas Brihaye, François Laroussinie, Nicol...
FPGA
2008
ACM
146views FPGA» more  FPGA 2008»
13 years 9 months ago
FPGA-optimised high-quality uniform random number generators
This paper introduces a method of constructing random number generators from four of the basic primitives provided by FPGAs: Flip-Flips, Lookup-Tables, Shift Registers, and RAMs. ...
David B. Thomas, Wayne Luk
MOVEP
2000
136views Hardware» more  MOVEP 2000»
13 years 11 months ago
UPPAAL - Now, Next, and Future
Uppaal is a tool for modeling, simulation and verification of real-time systems, developed jointly by BRICS at Aalborg University and the Department of Computer Systems at Uppsala ...
Tobias Amnell, Gerd Behrmann, Johan Bengtsson, Ped...