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HPCA
2000
IEEE
14 years 1 months ago
Software-Controlled Multithreading Using Informing Memory Operations
Memorylatency isbecominganincreasingly importantperformance bottleneck, especially in multiprocessors. One technique for tolerating memory latency is multithreading, whereby we sw...
Todd C. Mowry, Sherwyn R. Ramkissoon
ICPP
1998
IEEE
14 years 1 months ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang
APPT
2009
Springer
14 years 1 months ago
Dealing with Traffic-Area Trade-Off in Direct Coherence Protocols for Many-Core CMPs
Abstract. In many-core CMP architectures, the cache coherence protocol is a key component since it can add requirements of area and power consumption to the final design and, there...
Alberto Ros, Manuel E. Acacio, José M. Garc...
IPPS
2010
IEEE
13 years 7 months ago
Oblivious algorithms for multicores and network of processors
We address the design of algorithms for multicores that are oblivious to machine parameters. We propose HM, a multicore model consisting of a parallel shared-memory machine with hi...
Rezaul Alam Chowdhury, Francesco Silvestri, Brando...
QSHINE
2009
IEEE
14 years 4 months ago
Cooperative Training in Wireless Sensor and Actor Networks
Exploiting features of high density wireless sensor networks represents a challenging issue. In this work, the training of a sensor network which consists of anonymous and asynchro...
Francesco Betti Sorbelli, Roberto Ciotti, Alfredo ...