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1998
Tsinghua U.
15 years 9 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
HPCC
2009
Springer
15 years 8 months ago
Dynamically Filtering Thread-Local Variables in Lazy-Lazy Hardware Transactional Memory
Abstract--Transactional Memory (TM) is an emerging technology which promises to make parallel programming easier. However, to be efficient, underlying TM system should protect only...
Sutirtha Sanyal, Sourav Roy, Adrián Cristal...
GLOBECOM
2010
IEEE
15 years 2 months ago
A Coalition Formation Game in Partition Form for Peer-to-Peer File Sharing Networks
In current peer-to-peer file sharing networks, a large number of peers with heterogeneous connections simultaneously seek to download resources, e.g., files or file fragments, from...
Walid Saad, Zhu Han, Tamer Basar, Mérouane ...
IPPS
2010
IEEE
15 years 2 months ago
Modeling and analyzing the effects of firewalls and NATs in P2P swarming systems
Many P2P systems have been designed without taking into account an important factor: a large fraction of Internet users nowadays are located behind a network address translator (NA...
Lucia D'Acunto, Michel Meulpolder, Rameez Rahman, ...
TWC
2010
14 years 11 months ago
Cooperative wireless multicast: performance analysis and power/location optimization
The popularity of multimedia multicast/broadcast applications over wireless networks makes it critical to address the error-prone, heterogeneous and dynamically changing nature of ...
H. Vicky Zhao, Weifeng Su