In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...
Jaydeep Marathe, Frank Mueller, Tushar Mohan, Bron...
Abstract. In this paper we report on preliminary work and architectural design carried out in the "Data Management" work package in the International Data Grid project. O...
This paper describes an experiment to use the Spin model checking system to support automated verification of time partitioning in the Honeywell DEOS real-time scheduling kernel. ...
John Penix, Willem Visser, Eric Engstrom, Aaron La...
Telecommunications network management has attracted a lot of attention in terms of research and standardisation in the last decade. TMN and TINA architectural frameworks try to add...
We are designing a computational architecture for a "learning economy" based on personal software agents who represent users in a virtual society and assist them in find...