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ISPD
2012
ACM
288views Hardware» more  ISPD 2012»
12 years 5 months ago
Construction of realistic gate sizing benchmarks with known optimal solutions
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
Andrew B. Kahng, Seokhyeong Kang
SIGMOD
2012
ACM
203views Database» more  SIGMOD 2012»
12 years 20 days ago
Optimizing index for taxonomy keyword search
Query substitution is an important problem in information retrieval. Much work focuses on how to find substitutes for any given query. In this paper, we study how to efficiently ...
Bolin Ding, Haixun Wang, Ruoming Jin, Jiawei Han, ...
ISCA
2012
IEEE
320views Hardware» more  ISCA 2012»
12 years 19 days ago
Viper: Virtual pipelines for enhanced reliability
The reliability of future processors is threatened by decreasing transistor robustness. Current architectures focus on delivering high performance at low cost; lifetime device rel...
Andrea Pellegrini, Joseph L. Greathouse, Valeria B...
CIARP
2007
Springer
14 years 4 months ago
A Method for Estimating Authentication Performance over Time, with Applications to Face Biometrics
Underlying biometrics are biological tissues that evolve over time. Hence, biometric authentication (and recognition in general) is a dynamic pattern recognition problem. We propos...
Norman Poh, Josef Kittler, Raymond S. Smith, Jose ...
CVPR
2004
IEEE
15 years 7 days ago
A Unified Spatio-Temporal Articulated Model for Tracking
Tracking articulated objects in image sequences remains a challenging problem, particularly in terms of the ability to localize the individual parts of an object given selfocclusi...
Xiangyang Lan, Daniel P. Huttenlocher