473 search results - page 64 / 95 » Dynamic Memory Design for Low Data-Retention Power |
COMPCON
1994
IEEE
14 years 26 days ago
1994
IEEE
The Newton MessagePad Personal Digital Assistant (PDA) is the first in a class of devices distinguished by their pen-based user interface, communications capability, small size, a...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
Abstract— This paper presents a six-transistor (6T) singleended static random access memory (SE-SRAM) bitcell with an isolated read-port, suitable for low-Î and low-power embedd...
SIGMETRICS
2003
ACM
14 years 2 months ago
2003
ACM
The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system. The Operating System ...
CHES
2005
Springer
14 years 2 months ago
2005
Springer
Two new FPGA designs for the Advanced Encryption Standard (AES) are presented. The first is believed to be the fastest, achieving 25 Gbps throughput using a Xilinx Spartan-III (XC3...
LCTRTS
2010
Springer
14 years 3 months ago
2010
Springer
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...