473 search results - page 69 / 95 » Dynamic Memory Design for Low Data-Retention Power |
NOCS
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
ICRA
2008
IEEE
14 years 3 months ago
2008
IEEE
—We introduce an inexpensive, low complexity power surface system capable of simultaneously providing wireless power and bidirectional communication from a surface to multiple mo...
DAC
2004
ACM
14 years 9 months ago
2004
ACM
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
ICPPW
2007
IEEE
14 years 3 months ago
2007
IEEE
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
TVLSI
2008
13 years 8 months ago
2008
-- Aggressive CMOS scaling results in low threshold voltage and thin oxide thickness for transistors manufactured in deep submicron regime. As a result, reducing the subthreshold a...