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FPGA
2009
ACM
188views FPGA» more  FPGA 2009»
15 years 9 months ago
Clock power reduction for virtex-5 FPGAs
Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...
Qiang Wang, Subodh Gupta, Jason Helge Anderson
TACAS
2009
Springer
122views Algorithms» more  TACAS 2009»
15 years 9 months ago
Test Input Generation for Programs with Pointers
Software testing is an essential process to improve software quality in practice. Researchers have proposed several techniques to automate parts of this process. In particular, sym...
Dries Vanoverberghe, Nikolai Tillmann, Frank Piess...
136
Voted
CEC
2009
IEEE
15 years 9 months ago
How robot morphology and training order affect the learning of multiple behaviors
— Automatically synthesizing behaviors for robots with articulated bodies poses a number of challenges beyond those encountered when generating behaviors for simpler agents. One ...
Joshua S. Auerbach, Josh C. Bongard
ICASSP
2009
IEEE
15 years 9 months ago
Cheat-proof cooperation strategies for wireless live streaming social networks
Multimedia social network analysis is an emerging research area, which analyzes the behavior of users who share multimedia content and investigates the impact of human dynamics on...
W. Sabrina Lin, H. Vicky Zhao, K. J. Ray Liu
108
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ICASSP
2009
IEEE
15 years 9 months ago
Efficacy of a constantly adaptive language modeling technique for web-scale applications
In this paper, we describe CALM, a method for building statistical language models for the Web. CALM addresses several unique challenges dealing with the Web contents. First, CALM...
Kuansan Wang, Xiaolong Li