Sciweavers

5757 search results - page 1001 / 1152
» Dynamic Policy Programming
Sort
View
ISCAS
2005
IEEE
103views Hardware» more  ISCAS 2005»
14 years 2 months ago
Why area might reduce power in nanoscale CMOS
— In this paper we explore the relationship between power and area. By exploiting parallelism (and thus using more area) one can reduce the switching frequency allowing a reducti...
Paul Beckett, S. C. Goldstein
ISCAS
2005
IEEE
138views Hardware» more  ISCAS 2005»
14 years 2 months ago
Transition time bounded low-power clock tree construction
— Recently power becomes a significant issue in clock network design for high-performance ICs because the clock network consumes a large portion of the total power in the whole s...
Min Pan, Chris C. N. Chu, J. Morris Chang
ISCC
2005
IEEE
14 years 2 months ago
Optimal Delay-Constrained Minimum Cost Loop Algorithm for Local Computer Network
This study deals with the Delay-Constrained Minimum Cost Loop Problem (DC-MCLP) of finding several loops from a source node. The DC-MCLP consists of finding a set of minimum cost ...
Yong-Jin Lee, Mohammed Atiquzzaman
RTAS
2005
IEEE
14 years 2 months ago
A Distributed Real-Time Embedded Application for Surveillance, Detection, and Tracking of Time Critical Targets
As computer systems become increasingly internetworked, there is a growing class of distributed realtime embedded (DRE) applications that have characteristics and present challeng...
Joseph P. Loyall, Richard E. Schantz, David Corman...
RTCSA
2005
IEEE
14 years 2 months ago
FPGA-Based Content Protection System for Embedded Consumer Electronics
We propose a new architecture for a content protection system that conceals confidential data and algorithms in an FPGA as electrical circuits. This architecture is designed for a...
Hiroyuki Yokoyama, Kenji Toda
« Prev « First page 1001 / 1152 Last » Next »