49 search results - page 6 / 10 » Dynamic Register Renaming Through Virtual-Physical Registers |
MICRO
1995
IEEE
13 years 10 months ago
1995
IEEE
Current superscalar processors, both RISC and CISC, require substantial instruction fetch and decode bandwidth to keep multiple functional units utilized. While CISC instructions ...
ICDM
2005
IEEE
14 years 19 days ago
2005
IEEE
In practice, learning from data is often hampered by the limited training examples. In this paper, as the size of training data varies, we empirically investigate several probabil...
HIPEAC
2009
Springer
13 years 11 months ago
2009
Springer
Abstract. Exposing more instruction-level parallelism in out-of-order superscalar processors requires increasing the number of dynamic in-flight instructions. However, large instru...
ISCA
1995
IEEE
13 years 10 months ago
1995
IEEE
The PowerPC 620TM microprocessor1 is the most recent and performance leading member of the PowerPCTM family. The 64-bit PowerPC 620 microprocessor employs a two-phase branch predi...
DAGM
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a novel multi-view camera system that produces real-time single view scene video which sees through the static objects to observe the dynamic objects. The syste...