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ICPP
2008
IEEE
14 years 2 months ago
Taming Single-Thread Program Performance on Many Distributed On-Chip L2 Caches
This paper presents a two-part study on managing distributed NUCA (Non-Uniform Cache Architecture) L2 caches in a future manycore processor to obtain high singlethread program per...
Lei Jin, Sangyeun Cho
WICSA
2004
13 years 9 months ago
Software Reconfiguration Patterns for Dynamic Evolution of Software Architectures
A software reconfiguration pattern is a solution to a problem in component-based software systems where the configuration needs to be updated while the system is operational. It d...
Hassan Gomaa, Mohamed Hussein
CASES
2008
ACM
13 years 10 months ago
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
IPPS
2002
IEEE
14 years 1 months ago
Effective Cross-Platform, Multilevel Parallelism via Dynamic Adaptive Execution
This paper presents preliminary efforts to develop compilation and execution environments that achieve performance portability of multilevel parallelization on hierarchical archit...
Walden Ko, Mark N. Yankelevsky, Dimitrios S. Nikol...