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ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
11 years 11 months ago
BlockChop: Dynamic squash elimination for hybrid processor architecture
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
Jason Mars, Naveen Kumar
CF
2011
ACM
12 years 8 months ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...
ICSE
2009
IEEE-ACM
14 years 3 months ago
Using quantitative analysis to implement autonomic IT systems
The software underpinning today’s IT systems needs to adapt dynamically and predictably to rapid changes in system workload, environment and objectives. We describe a software f...
Radu Calinescu, Marta Z. Kwiatkowska
KBSE
2010
IEEE
13 years 7 months ago
RESISTing reliability degradation through proactive reconfiguration
Situated software systems are an emerging class of systems that are predominantly pervasive, embedded, and mobile. They are marked with a high degree of unpredictability and dynam...
Deshan Cooray, Sam Malek, Roshanak Roshandel, Davi...
SAC
2006
ACM
14 years 2 months ago
A UML 2-compatible language and tool for formal modeling real-time system architectures
ArchiTRIO is a formal language, which complements UML 2.0 concepts with a formal, logic-based notation that allows users to state system-wide properties, both static and dynamic, ...
Pietro Colombo, Matteo Pradella, Matteo Rossi