989 search results - page 19 / 198 » Dynamic Symmetry Reduction |
POPL
2005
ACM
14 years 10 months ago
2005
ACM
We present a new approach to partial-order reduction for model checking software. This approach is based on initially exploring an arbitrary interleaving of the various concurrent...
FPL
2008
Springer
13 years 11 months ago
2008
Springer
The power consumption of Dynamically Reconfigurable Processing Array (DRPA) is quantitatively analyzed by using a real chip layout and applications taking into account the reconfi...
VLDB
2007
ACM
14 years 10 months ago
2007
ACM
Abstract The notorious "dimensionality curse" is a wellknown phenomenon for any multi-dimensional indexes attempting to scale up to high dimensions. One well-known approa...
EURODAC
1995
IEEE
14 years 1 months ago
1995
IEEE
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
STTT
2010
13 years 8 months ago
2010
Abstract. Runtime (dynamic) model checking is a promising verification methodology for real-world threaded software because of its many features, the prominent ones being: (i) it ...