Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
An architecture and associated protocols are presented for managing multicast addresses and performing connection control for applications that use multicast communication faciliti...
We study online job scheduling on a processor that can vary its speed dynamically to manage its power. We attempt to extend the recent success in analyzing total unweighted flow ti...
In this paper the fading multiple antenna (MIMO) wire-tap channel is investigated under short term power constraints. The secret diversity gain and the secret multiplexing gain ar...
We study the performance of packet routing on arrays (or meshes) with bounded buffers in the routing switches, assuming that new packets are continuously inserted at all the nodes....