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» Dynamic power management under uncertain information
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ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
13 years 11 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
INFOCOM
1995
IEEE
13 years 11 months ago
Address Management and Connection Control for Multicast Communication Applications
An architecture and associated protocols are presented for managing multicast addresses and performing connection control for applications that use multicast communication faciliti...
Alexandros Eleftheriadis, Sassan Pejhan, Dimitris ...
ESA
2010
Springer
149views Algorithms» more  ESA 2010»
13 years 7 months ago
Non-clairvoyant Speed Scaling for Weighted Flow Time
We study online job scheduling on a processor that can vary its speed dynamically to manage its power. We attempt to extend the recent success in analyzing total unweighted flow ti...
Sze-Hang Chan, Tak Wah Lam, Lap-Kei Lee
CISS
2008
IEEE
14 years 1 months ago
Diversity-multiplexing tradeoff for the multiple-antenna wire-tap channel
In this paper the fading multiple antenna (MIMO) wire-tap channel is investigated under short term power constraints. The secret diversity gain and the secret multiplexing gain ar...
Melda Yuksel, Elza Erkip
LATIN
1998
Springer
13 years 11 months ago
Dynamic Packet Routing on Arrays with Bounded Buffers
We study the performance of packet routing on arrays (or meshes) with bounded buffers in the routing switches, assuming that new packets are continuously inserted at all the nodes....
Andrei Z. Broder, Alan M. Frieze, Eli Upfal