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HIPEAC
2009
Springer
14 years 6 days ago
Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering
Abstract. In transactional memory, aborted transactions reduce performance, and waste computing resources. Ideally, concurrent execution of transactions should be optimally ordered...
Mohammad Ansari, Mikel Luján, Christos Kots...
JTRES
2009
ACM
14 years 2 months ago
On transforming Java-like programs into memory-predictable code
The ScopedMemory class of the RTSJ enables the organization of objects into regions. This ensures time-predictable management of dynamic memory. Using scopes forces the programmer...
Diego Garbervetsky, Sergio Yovine, Víctor A...
CODES
2000
IEEE
14 years 1 days ago
Co-design of interleaved memory systems
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
Hua Lin, Wayne Wolf
FPL
2004
Springer
164views Hardware» more  FPL 2004»
13 years 11 months ago
Dynamic Prefetching in the Virtual Memory Window of Portable Reconfigurable Coprocessors
Abstract. In Reconfigurable Systems-On-Chip (RSoCs), operating systems can primarily (1) manage the sharing of limited reconfigurable resources, and (2) support communication betwe...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
TC
2008
13 years 7 months ago
Secure Memory Accesses on Networks-on-Chip
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...