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TVLSI
2008
111views more  TVLSI 2008»
13 years 10 months ago
GlitchLess: Dynamic Power Minimization in FPGAs Through Edge Alignment and Glitch Filtering
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
JAIR
2010
160views more  JAIR 2010»
13 years 8 months ago
Reasoning About the Transfer of Control
We present DCL-PC: a logic for reasoning about how the abilities of agents and coalitions of agents are altered by transferring control from one agent to another. The logical foun...
Wiebe van der Hoek, Dirk Walther, Michael Wooldrid...
AMAI
2008
Springer
13 years 10 months ago
Set based logic programming
In a previous paper [BMR01], the authors showed that the mechanism underlying Logic Programming can be extended to handle the situation where the atoms are interpreted as subsets o...
Howard A. Blair, Victor W. Marek, Jeffrey B. Remme...
ENTCS
2006
101views more  ENTCS 2006»
13 years 10 months ago
Towards "Dynamic Domains": Totally Continuous Cocomplete Q-categories
It is common practice in both theoretical computer science and theoretical physics to describe the (static) logic of a system by means of a complete lattice. When formalizing the d...
Isar Stubbe
ENTCS
2006
114views more  ENTCS 2006»
13 years 10 months ago
Run-Time Checking of Dynamic Properties
We consider a first-order property specification language for run-time monitoring of dynamic systems. The language is based on a linear-time temporal logic and offers two kinds of...
Oleg Sokolsky, Usa Sammapun, Insup Lee, Jesung Kim