Many numerical solutions of large scale simulation models require finer discretizations in some regions of the computational grid. When this region is not known in advance, adapti...
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
The computational power provided by many-core graphics processing units (GPUs) has been exploited in many applications. The programming techniques currently employed on these GPUs...
Long Chen, Oreste Villa, Sriram Krishnamoorthy, Gu...
As software projects evolve, possibly differing in size, complexity, scope, and purpose, the development processes that support the project must evolve to reflect these changes. T...
Arthur S. Hitomi, Gregory Alan Bolcer, Richard N. ...