234 search results - page 9 / 47 » Dynamically Reconfigurable Vision-Chip Architecture |
PROCEDIA
2010
13 years 5 months ago
2010
Currently several computational problems require high processing power to handle huge amounts of data, although underlying core algorithms appear to be rather simple. Especially i...
EH
1999
IEEE
14 years 3 months ago
1999
IEEE
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
ARC
2008
Springer
14 years 27 days ago
2008
Springer
Abstract. This paper presents a novel dynamically reconfigurable hardware architecture for lossless compression and its optimization for space imagery. The proposed system makes us...
IPPS
1999
IEEE
14 years 3 months ago
1999
IEEE
A desired mesh architecture, based on connected-cycle modules, is constructed. To enhance the reliability, multiple bus sets and spare nodes are dynamically inserted to construct m...
WOB
2004
14 years 7 days ago
2004
ABSTRACT. Reconfigurable systolic arrays can be adapted to efficiently resolve a wide spectrum of computational problems; parallelism is naturally explored in systolic arrays and r...