Sciweavers

7 search results - page 1 / 2
» Economic efficiency analysis of wafer fabrication facilities
Sort
View
WSC
2008
13 years 10 months ago
Economic efficiency analysis of wafer fabrication facilities
Semiconductor industry is capital intensive and competitive, and thus efficiently utilizing resources to provide products and services is essential for maintaining competitive adv...
Wen-Chih Chen, Chen-Fu Chien, Ming-Hsuan Chou
WSC
2007
13 years 10 months ago
Simulation experimental investigation on job release control in semiconductor wafer fabrication
This paper presents a new job release methodology, WIPLOAD Control, especially in semiconductor wafer fabrication environment. The performance of the proposed methodology is evalu...
Chao Qi, Appa Iyer Sivakumar, Stanley B. Gershwin
EOR
2007
82views more  EOR 2007»
13 years 7 months ago
Minimizing makespan with multiple-orders-per-job in a two-machine flowshop
: New semiconductor wafer fabrication facilities use Front Opening Unified Pods (FOUPs) as a common unit of wafer transfer. Since the number of pods is limited due to high costs, a...
Jeffrey D. Laub, John W. Fowler, Ahmet B. Keha
WSC
2004
13 years 9 months ago
Comparative Factory Analysis of Standard FOUP Capacities
Wafers in a 300-mm semiconductor fabrication facility are transported throughout the factory in carriers called front opening unified pods (FOUPs). Two standard capacities of FOUP...
Kranthi Mitra Adusumilli, Robert L. Wright
WSC
2008
13 years 10 months ago
Managing WIP and cycle time with the help of Loop Control
As an adaptation of the CONWIP concept, AMD has developed a heuristic approach to control the WIP in its wafer fabrication facilities (fabs). The so called "Loop Control"...
Steffen Kalisch, Robert Ringel, Jorg Weigang