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» Effective Program Verification for Relaxed Memory Models
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SPAA
2005
ACM
14 years 20 days ago
Efficient algorithms for verifying memory consistency
One approach in verifying the correctness of a multiprocessor system is to show that its execution results comply with the memory consistency model it is meant to implement. It ha...
Chaiyasit Manovit, Sudheendra Hangal
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
13 years 1 months ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman
IEEEPACT
2005
IEEE
14 years 21 days ago
Communication Optimizations for Fine-Grained UPC Applications
Global address space languages like UPC exhibit high performance and portability on a broad class of shared and distributed memory parallel architectures. The most scalable applic...
Wei-Yu Chen, Costin Iancu, Katherine A. Yelick
PLDI
2010
ACM
14 years 5 days ago
Adversarial memory for detecting destructive races
Multithreaded programs are notoriously prone to race conditions, a problem exacerbated by the widespread adoption of multi-core processors with complex memory models and cache coh...
Cormac Flanagan, Stephen N. Freund
ASPLOS
2004
ACM
14 years 16 days ago
Low-overhead memory leak detection using adaptive statistical profiling
Sampling has been successfully used to identify performance optimization opportunities. We would like to apply similar techniques to check program correctness. Unfortunately, samp...
Matthias Hauswirth, Trishul M. Chilimbi